Information Technology Reference
In-Depth Information
N
bs
=
N
CW
k
−
N
MPDU
(7)
N
PSDU
=
N
MPDU
+
N
bs
(8)
Pad bits shall be appended to the input bit stream to align on the symbol
boundary. The number of pad bits is given by the equation 9, where M is the
cardinality of the constellation of a given modulation scheme. The standard
defines two constellation mappings schemes (M=2 ,M=16).
N
pad
=log
2
(
M
)
N
PSDU
+(
n
k
)
N
CW
log
2
(
M
)
−
−
[
N
PSDU
+(
n − k
)
N
CW
]
(9)
If M=2, then the number of pad bits is zero which is evident from equation
9 and if M=16, the number of bits in the PSDU frame should be divisible by 4.
By using mathematical deduction, the pad bits depends only on the number of
stuff bits which are inserted at the last code word of BCH encoder.
After adding the pad bits, interleaving is carried out in order to protect the
data from burst errors. Interleaving turns burst errors into random errors. The
algebraic interleaver is is given in equation 10:
(
n
)=
nb
s
ModN
I
(10)
where
N
I
is interleaver's length. The interleaver's length is set to 192 and seeding
parameter
b
s
, to 37. If
N
rem
=rem(
N
T
,
N
I
)
= 0, the last interleaver block,
N
I
is
set to
N
rem
. Two design methodologies are considered in this paper and their
details are given below.
3.1 Architecture 1 (A1)
In this architecture, a synchronous pipeline is used and the design is described
in Verilog. A low complexity transmitter controller controls all the activities of
the PHY layer. It controls the dataflow in the pipeline. The dataflow control
is achieved by running enable lines to the various blocks from the controller. It
stalls the scrambler while the BCH coder generates the parity bits. The functions
of the controller are stated below.
-
Getting information about the MPDU to be transmitted, from the MAC.
-
Generating stall signals for the pipeline.
-
Calculation of interleaver's block size.
-
Calculation of number of pad bits to be inserted and pad bit enable signal
generation.
-
PHR and PSDU sequencing is controlled by this block.
The working of the front-end controller is shown in the flowchart Fig 3. The
length
in the flowchart has to be initialized with the total length of MPDU.
