Information Technology Reference
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2.2 Physical Layer Header
The PHR contains information that is vital in decoding the PSDU. The length
of the PHR (N header ) is 40 bits. The PHR consists of 24 bits of PHR frame, 4
bits of Head check sequence and 12 BCH parity bits. In PHR, frame bits 0-2
indicates data rate; bits 4-11 indicates the length of the frame body ( L 0 to L 7 ),
where L 7 is the MSB and L 0 is the LSB; bit 14 specifies if burst mode is being
used; bits 15-16 specify the type of pulse shaper used; bits 17 & 18 are used
in HARQ retransmission flow; bit 19 shall encode the scrambler seed; bit 20
represents the constellation mapping used for on-off modulation. All other bits
are reserved according to the standard.
2.3 Physical Layer Service Data Unit
The PSDU contains the MPDU and the BCH parity bits. The MPDU is formed is
by prepending the 7-octet MAC header to the MAC frame body and appending
a 2-octet FCS to the result. The maximum size of the MAC frame body is 255
octets, and this information is carried in the PHY header in octets.
3 Ultra Wideband Baseband Transmitter Design
The overall block diagram of a compliant digital baseband transmitter for UWB
PHY specification is shown in Fig. 2. The baseband module can be divided into
two parallel processing blocks. One of the blocks is used for the creation of the
physical layer header (PHR). The other block is for the generation of PSDU from
MPDU. To increase the robustness of the PHR frame, it is protected by a CRC4
as well as a BCH channel code. The CRC4 will append 4-bits for error detection.
The HCS (CRC4) is implemented by using ones complement of the remainder
generated by modulo-2 division of the PHR information by the polynomial, as
shown in equation 1. After the HCS phase, the PHR frame consisting of 24
bits data and the 4-bits checksum will be processed by a shortened BCH(40,28)
encoder. The BCH(40,28) channel code is derived from a BCH(63,51,t=2) code
by appending 23 zero bits (called shortening bits) to the 28 information bits.
After BCH encoding, the shortening bits are removed and the PHR frame is
stored in a shift register, from which it is later read while it is being sequenced
with the PSDU.
g ( x )=1+ x + x 4
(1)
The construction of the PSDU from the MPDU is as follows: The MAC en-
queues the MPDU packet in the TXFIFO. From TXFIFO, the data is processed
by an additive scrambler with the generator polynomial x [ n ] given in equation 2.
The scrambler has two seed values which is set by the MAC.
x ( n )=1+ x 2 + x 12 + x 13 + x 14
(2)
 
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