Information Technology Reference
In-Depth Information
Fig. 2.
Flowchart of diagnosis procedure
SA1
SA0
D
D
0
1
SA0
SA0
0
0
D
D
1
0
Fig. 3.
Opposite polarity fault masking
we take the union of all faults detectable by passing patterns and subtract it from
suspect list of Phase 1. Phase 3 takes an intersection of the suspected fault lists
of all failing patterns. The resulting faults are called
prime suspects
.These
faults are of low priority, but there is a chance that they can be surrogate of
an actual fault or one of the actual faults. In Phase 4, equivalent faults of the
identified suspected faults are added to the suspect list. To guard against fault
masking, we include the opposite polarity faults of the faults that are present in
SET1 and SET2, to get the final candidate fault lists. The pseudocode for the
entire algorithm is available in a recent thesis [6].
If the actual defect is a single stuck-at fault, the algorithm identifies it as
a “prime suspect” in Phase 2. For other defects, it provides a list of surrogate
single stuck-at faults “resembling” the actual defect in location or behavior.
Masking.
In Figure 3, the top input of an AND gate is stuck-at-1 (SA1) and
the output is stuck-at-0 (SA0). To activate the first fault, a '0' must be supplied
to the top input and a '1' must be supplied to the bottom input to propagate
it. This will produce a
D
on the top input, where
D
=1ifSA1ispresenton
that input or
D
= 0 if the input is fault free. However,
D
will be masked at the
output by the SA0 fault. The diagnosis procedure will identify output SA0 as
the only suspect. Therefore, SA0s on both inputs are also included as suspects.
Similarly, for the NOR gate in Figure 3, when the top input and output have
SA0s, the masking occurs. Therefore, Phase 4 enhances the suspect list with all
opposite polarity faults for equivalent faults of a suspected single stuck-at fault.
