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To reduce the Miller effect experienced by the gate-drain capacitances of the input
transistors M 9 and M 12 , a capacitive cancellation technique [13] is used. This is
implemented using transistor M 23 and M 24 acting as capacitances. This technique has
been used to increase the bandwidth of multistage amplifiers in wideband circuits
[14]. The principle here is that the Miller capacitances due M 23 and M 24 are negative
because of their cross-connections. Thus they cancel the Miller capacitances due to
the gate-drain capacitances of M 9 and M 12 , and thus significantly reduce the net Miller
capacitances, and hence achieve wide-band performance. Also, note that the two
currents I C2 and I C1 from the control circuit in Fig. 1 are mirrored to M 13 and M 14 .
Since the transconductance is a function of the bias current, the gain variation is
obtained by controlling the bias currents of the input-pair (M 9 and M 12 ) and the loads
(M 10 and M 11 ). Therefore, the differential gain of the VGA cell shown in Fig. 3 is:
g
(
W
/
L
)
I
m
M
9
,
12
M
9
,
12
C
2
A
=
=
(5)
v
g
(
W
/
L
)
I
m
M
10
,
11
M
10
,
11
C
V DD
M 15
M 16
M 7
M 8
V out-
V out+
C p
M 23
M 24
V out+
V i n+
V in-
V ou t-
M 9
M 10
M 11
M 12
M 17
M 18
M 19
M 20
V ref
I C2
I C1
V bias
V b ias
C 2
C 1
M 14
M 21
M 22
M 13
V SS
(VGA Cell circuit) (Common-mode feedback circuit [2])
Fig. 3. Amplifying block Schematic
From (4) and (5), the differential gain in terms of the control voltage V C can be
expressed as
2
I
V
o
c
+
1
+
(
)
(
)
2
V
V
(
W
/
L
K
V
V
dd
TH
M
12
dd
TH
A
=
*
(6)
v
2
(
W
/
L
M
10
,
11
I
V
o
c
+
1
(
)
(
)
2
V
V
K
V
V
dd
TH
dd
TH
In this equation, by adjusting the bias current I O , the gain can be controlled. For the I O
value corresponding to k = 0.12, the circuit yields more than 60 dB gain variation.
 
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