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Fig. 4.
Comparison between SV approach in C code of output of CMOS NAND Gate
Tabl e 1.
Transient runtime comparsion between ngspice and SV method
Ngspice SV method in C Speedup
Inverter(2 transistors and 1 capacitor)
18.20ms
0.18ms
101.11x
NAND GATE(4 transistors and 1 capacitor) 22.40ms
0.25ms
89.60x
Fulladder(24 transistors and 2 capacitors)
100.5ms
5.43ms
18.51x
partially consistence with commercial software but some parts of waveforms lag
by 0-6 microseconds. Table 1 lists the comparison of elapsed time of state variable
approach in C with Ngspice for each circuit. Surprisingly, the approach can save
computation power significantly in very small circuit, such effect,however, is
diminished as the circuit becomes larger. Tests are performed on the desktop
computer with Intel Xeon W3520 CPU in 2.67GHz and 12GB DRAM. The
operating system is Windows 7 Enterprise SP 1.
5 Future Work
In the next stage of this research, the idea of independent time steps and parti-
tioning of the circuit, [11-13], will be introduced. Circuits can be broken down
into many subcircuits; each subcircuit acts as a macromodel and can be solved
independently. Another approach is to treat each macro-model as a grid and
solve it in a similar way to calculating the 2-D heat equation [14]. The explicit
Runge Kutta method is generally not stable enough for typical circuit equations.
There are more stable numerical integration methods, such as Burlisch-Stoer.
6Con lu on
There are limitations to massively parallelizing the traditional circuit simula-
tion algorithm and generally, only the device evaluation phase can be easily
parallelized. In contrast, matrix solution phase still needs to be done serially.
Therefore, we have proposed a new approach that converts MNA equations to
SV form and solves the equations by the Runge-Kutta method instead of stan-
dard integration methods. An MNA to SV transformer has been developed in
