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In-Depth Information
The other design concern with 6T SRAM cell is the read/write conflict, wherein a
transistor sizing to enhance the read-stability degrades the write-ability and vice-
versa. The measured result also shows that the use of high-
k
spacers can mitigate
read/write conflict. The read/write stability is not directly dependent on the absolute
value of
I
on
[11]. Apparently; SNM has a negative correlation with DIBL [12]. In
agreement to this, it is observed that the SNMs are considerably improved using high-
k
spacers without affecting cell ratio and pull-up ratio.
5
Conclusion
This research paper presents the effect of underlap length for different spacer mate-
rials on device performance parameters such as drive-current, leakage current and
their ratio. The fringe capacitance component (included in total-gate capacitance) and
the relative change in a drive current-to-capacitance are also investigated that helps to
optimize circuit delay. SRAM performance as a function of varying underlap and
spacer materials are clearly depicted in the paper. Considering the SRAM discussion,
we conclude that for high-
k
spacer and the underlap length near about 4nm
provides superior performance improvements and thereafter, the cell designs metric
degrades.
References
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