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In-Depth Information
Here, result of WCPG_in_PG, WCPG and PG in % saving are compared with no
PG. In no PG technique, leakage power is calculated at the negative edge of clock
during idle period. In PG technique, at a time one sub-FSM is in active mode and
other one is in power gated mode. Leakage power is calculated during the period
where no transition occurs. In WCPG technique, leakage power is calculated at the
positive edge of clock during idle time and at the negative edge of clock it evaluates
the states.
Leakage power and average total power (dynamic + leakage) of WCPG_in_PG
for few input combinations with different frequency are tabulated in Table 1 and 2
respectively. Table 1 and 2 show that with the decrease of frequency as clock period
increase, leakage power and average total power consumption decreases. Average
power (switching and leakage) and average leakage power saving of WCPG_in_PG,
WCPG, and PG with respect to no PG at 0.1MHz frequency have also been noted in
Table 3. Table 3 shows that, on the average 90% saving in leakage and around 80%
saving in total power are obtained compared to the no power gating technique at
0.1MHZ.
Table 1.
Leakage power of WCPG_in_PG
Leakage power (nw) of WCPG_in_PG
Frequency(MHz)
Input
IN1
IN2
IN3
IN4
0.1
0.05
0.03
0.025
0
0
1
0
2.04
2.05
2.10
1.93
0
1
1
0
1.14
1.10
1.03
0.40
0
0
0
0
1.5
1.04
0.75
0.67
0
1
0
0
1.02
0.87
0.85
0.68
0
0
1
1
1.16
0.86
0.84
0.83
Average Leakage power
1.16
0.99
0.93
0.76
Table 2.
Average total power (dynamic + leakage) of WCPG_in_PG
Frequency(MHz)
0.1
0.05
0.03
0.025
Average of total power (nw) of WCPG_in_PG
2.27
2.23
2.2
2.18
Table 3.
Average leakage power and average power saving
Frequency
Average Leakage saving with respect to no PG
Average power saving with respect to no PG
PG
WCPG
WCPG_in_PG
PG
WCPG
WCPG_in_PG
0.1 MHz
16.23%
75.00%
90.00%
53.60%
56.00%
80.95%
5
Conclusion
This paper presents the architecture implementation of WCPG_in_PG technique in
CADENCE Virtuoso Spectre at 45nm technology. Leakage power and total power
saving are reported in this architectural approach. Results confirm that average lea-
kage power and as well as total power saving are more in this technique than no PG,
PG, WCPG technique. It is also observed that leakage power and average total power
reduces with down scaling of frequency. However, the reported circuit is small.
