An Efficient RF Energy Harvester with Tuned Matching Circuit - VLSI Design and Test - page 143

is going to degrade. Energy harvesting circuits also have some specific range of
load impedance that varied according to the number of stages, types of nonlinear
device, and the choice of reactive component, therefore it is important to verify
the selection of load impedance range and its impact on the circuit performance.
3 Simulation Results, Analysis and Discussion
Our aim is to calculate the steady state solution of nonlinear circuit or measure-
ment of the various frequencies present in the system, so we use the harmonic
balanced analysis (a frequency domain method). The another method so called
transient analysis (time domain) is not used due to the reason that it must
collect sucient samples for the highest frequency component and it involves
significant memory and processing requirement.
For simulation the values of inductor L, tuned capacitors C t 1 , C t 2 and stages
capacitor are 31nH, 5.81pF, 0.66pF and 36pF repsectively. Width and length
of microstrip transmission line is 1.032mm and 0.774mm respectively, here all
simulations are performed at 915MHz.
We simulate the effect of load impedance on the output power and eciency
of the circuit with input power sweep -20 to 20dBm and load impedance sweep
value 10-160kOhm for RF input power. Fig.5, 6, 7 and 8 shows the effects of load
impedance. We examine that the circuit attains the highest eciency at some
particular load impedance. From Fig.6, 7 and 8 it is clear that the circuit gives
highest eciency in case of 60kOhm, it reduces drastically if the load value is too
low or too high. In[10], for 0dBm input power at 950 MHz an ecient Periodic
Steady State(PSS)-based power matching circuit gives 55.2% eciency for RF
to DC converter system. In[3], harvester circuit provides the highest eciency
71%, the proposed circuit gives the maximum eciency nearly equal to 80% for
3-stage, 5-stage and 7-stage which is shown in Fig.3. From Fig.6, 7 and 8 it is
Fig. 6. Effect of load impedance on the eciency of 3 rd stage of harvester circuit