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The transconductance, G m (=∂I D /∂V GS ) is a figure of merit which indicates how well
a device converts a voltage to a current. Below the gate voltage of V GS ~ 0.55 V, all
three devices have almost similar value of G m . After V GS = 0.7 V, DM-DGS has highest
G m followed by DMG and SMG DGJLT as shown in fig. 3. Due to potential uplift at
workfunction transition, G m is increased for DM-DGS and DMG DGJLT. In JLT, drain
current is mainly due the bulk current; and since its value is smaller, transconductance is
inferior as compared to conventional inversion mode devices (not shown). The values of
G m for DM-DGS, DMG and SMG DGJLT are 1.52 mS, 1.45 mS and 1.37 mS
respectively at V GS =0.9 V. Transconductance generation factor is another important
figure of merit representing the efficiency of a transistor to convert dc power into ac
frequency and gain. It is also called transconductance/drain current ratio ( G m /I D ). The
G m /I D with respect to gate voltage, V GS is plotted in fig. 3 for a drain voltage, V DS of 1
V. The values of G m /I D for SMG,
3.5x10 12
0.7
0.6
3.0x10 12
0.5
DM-DGS
D MG
SMG
0.4
2.5x10 12
0.3
0.2
2.0x10 12
V GS = 1 V
0.1
0.0
1.5x10 12
0.0
0.2
0.4
0.6
0.8
1.0
Drain Voltage, V DS
1.0x10 12
5.0x10 11
0.0
0.0
0.2
0.4
0.6
0.8
1.0
Gate Voltage, V GS (V)
Fig. 4. Output resistance (R O ) with respect to gate voltage at V DS = 1 V. Insight is drain current
with respect to drain voltage at V GS = 1 V for the devices. L =40 nm, T si =8 nm and T ox =2 nm
DMG and DM-DGS DGJLT are 39.92 V -1 , 36.94 V -1 , 36.82 V -1 respectively at
V GS =0.2 V. A smaller value of subthreshold slope (SS) for SMG implies its higher
G m /I D value in the subthreshold region. G m /I D is mainly controlled by the body factor
of the devices in weak inversion regime; however its value decreases in
moderate/strong inversion regime due to the lower mobility at higher doping
concentration [5].
Insight of Fig. 4 shows the drain current (I D ) with respect to drain voltage for the
devices at V GS = 1 V. DM-DGS has higher output current, followed by DMG and
SMG DGJLT for aforementioned reasons. Fig. 4 also presents the output resistance
(R O ) with respect to V GS . DMG architecture offers slightly higher value of R O in the
subthreshold region due to smaller slope in I D -V DS characteristics as compared to
DM-DGS, followed by SMG DGJLT as can be seen from the figure. However, the
value of R O is highest for DM-DGS followed by DMG and SMG DGJLT for gate
voltage of ~ 0.5 V or higher. The values of R O for DM-DGS, DMG and SMG DGJLT
are 44.4 kΩ, 29.3 kΩ and 16.5 kΩ respectively at a gate voltage of 1 V.
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