Information Technology Reference
In-Depth Information
Tabl e 2.
Comparision of Switching activity, Time and Energy consumption of the
programs in Fig. 1
Program
Metric
Value
Metric
LU's Gain LUG's Gain LUG's Gain
wrt
Org
(%) wrt
Org
(%) wrt
LU
(%)
Original
Switching
1999986
Switching
-
-
-
(
Org
)
Time(ms)
36.90
Time
-
-
-
E
TL
(mJ)
28.10
E
TL
-
-
-
E
dl
1
−addr bus
(mJ) 5.69
E
dl
1
−addr bus
-
-
-
Loop Unrolling
Switching
1999986
Switching
0.0
-
-
(
LU
)
Time(ms)
27.60
Time
25.20
-
-
E
TL
(mJ)
19.90
E
TL
29.18
-
-
E
dl
1
−addr bus
(mJ) 5.69
E
dl
1
−addr bus
0.0
-
-
Loop Unrolling
Switching
1124989
Switching
-
43.75
43.75
with partial
Time(ms)
27.60
Time
-
25.20
0.0
Gray code
E
TL
(mJ)
16.70
E
TL
-
40.56
16.08
sequence (
LUG
)
E
dl
1
−addr bus
(mJ) 3.2
E
dl
1
−addr bus
-
43.75
43.75
Tabl e 3.
Benchmark Programs
Benchmark
Description
T
init
T
comp
Symbol Count Finds frequency of symbols in a string of size
ˉ
=10
3
,each
(
SCount
)
symbol belongs to a set of
n
=2
20
symbols.
uf
=2
4
O
(
n
)
O
(
ˉ
)
Counting Sort A linear time sort on an array of
m
=10
3
integers, each integer lies
(
CSort
)
between 0 and
n
=2
20
.
uf
=2
4
O
(
n
)
O
(
m
)
0-1 Knapsack Given costs and weights of
r
= 3 types of items, fill a knapsack of
(
KS
)
capacity
n
=10
6
such that the sum of cost of the elements to fill it
O
(
n
)
O
(
r × n
)
is maximum.
uf
=2
4
Treasure
Given an
n
×
n
grid, each coordinate of the grid has a cost, staring
Island
from the lower-left corner (1
,
1) one has to reach upper-right corner
O
(
n
)
O
(
n
2
)
(
TI
)
(
n, n
), either by moving upward or rightward in each step, such
that the cost of the path traversed is maximum.
n
=2
9
,uf
=2
4
Depth First Depth First Traversal of a randomly generated graph with
n
=2
10
Search (
DFS
)verticesand
e
=
O
(
n
2
)edges.
uf
=2
4
O
(
n
)
O
(
max{n, e}
)
4Con lu on
The present work introduces a software based approach to reduce energy con-
sumed on the address bus of the data memory. This is done by reducing switching
activity on the address bus of the data memory, with the help of
LUG
. Transla-
tion of a loop with array initialization to
LUG
is introduced. The expressions for
switching activity on the bus for
LU
and
LUG
are derived. The proposed trans-
lation technique finds a relocatable base address of the array so that the partial
Gray code sequence is maintained, without any energy-performance overhead
and achieves a considerable amount of energy reduction without any perfor-
mance loss. The proposed method achieves 25-50% reduction in switching activ-
ity on the address bus of on-chip data memory. The proposed work is evaluated
on five benchmark programs.
LUG
is more applicable for the programs having
