Digital Signal Processing Reference
In-Depth Information
Analog Voltage Input
Low Pass Filter (Anti−aliasing)
+
+
C
Sample and Hold (Unity Gain)
S/H Control Signal
Analog To Digital Converter
Binary−Encoded Samples
Figure 3.1:
A typical sampling arrangement, showing an anti-aliasing filter followed by a sample-and-
hold, which captures and holds an analog value to be digitized by the ADC.
them between frames. From looking at the sequence of frames, each one five seconds apart, we
could not say what had taken place between frames.
Likewise, when sampling a waveform, too low a sampling rate for the frequencies present in the
waveform causes loss of vital information as to what went on between samples.
Example 3.1.
Illustrate the effect of sampling an 8 Hz sinusoid at sample rates varying from 240 Hz
downward to 8 Hz.
The script
LVAliasingMovieSine
performs a demonstration of the effect of various sampling rates applied to eight cycles of a sinusoid,
partly automated and partly requiring user manual input. A similar demonstration is given by the VI
DemoAliasingMovieSineV I
which requires on-screen manual variation of the sample rate
F
S
of an 8 Hz sine wave between
F
S
= 120
Hz and
F
S
= 8 Hz.
Figure 3.3, plot (a), shows eight cycles of a sine wave in which the sample rate is 240, or about 30
samples per cycle.
If instead of a 240 Hz sampling rate, we use 24 Hz instead, we can still see what appears to be
eight cycles of a waveform, since there are three samples per cycle (at 0, 120, and 240 degrees).
