Digital Signal Processing Reference
In-Depth Information
Consider the case of a 32-sample ROM containing one cycle of a sine wave. The ROM is sequen-
tially read out, one address at a time, at a rate of 48 kHz, yielding a net output frequency of
48000
·
1
F
Out
=
=
1500 Hz
32
Intuitively, if we wanted an output frequency of 4500 Hz, we would simply read out every third
sample from the ROM, i.e., decimate by a factor of three. In the example shown in Fig. 3.37, plots (a)
and (b), every third sample has been taken, resulting in three cycles of a sine wave over 64 samples
(instead of the original one cycle over 64 samples stored in the ROM), the cycles containing an average
64/3 samples. Sample addresses exceeding the ROM size are computed in modulo-fashion. For example,
if we were taking every 7th sample of a 32-sample ROM, and enumerating addresses as 1-32 (as opposed
to 0-31), we would read out addresses 7, 14, 21, 28, 3 (since 35 - 32 = 3), 10 (since 42 - 32 = 10), etc.
1
1
0
0
−1
−1
0
20
40
60
0
20
40
60
(a) Sample
(b) Sample
1
1
0
0
−1
−1
0
20
40
60
0
20
40
60
(c) Sample
(d) Sample
1
1
0
0
−1
−1
0
20
40
60
0
20
40
60
(e) Sample
(f) Sample
Figure 3.37:
(a) A 64-sample sine wave; (b) The resultant waveform from reading out every third sample,
i.e., sample indices 1, 4, 7, etc; (c) Original 64-sample sequence; (d) Decimated by a factor of 32 (only
phases 0 and 180 degrees of the sine are read); (e) Original 64-sample sequence; (f ) Result from taking
every 34th sample.
