Baseband Hardware Designs in Modernised GNSS Receivers - Global Navigation Satellite Systems: Signal,Theory and Applications - page 52

Namgoong, W. & Meng, T. (2001b). Minimizing power consumption in direct sequence
spread spectrum correlators by resampling IF samples-Part II: implementation
issues, Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions
on 48(5): 460-470.
Namgoong, W., Reader, S. & Meng, T. (2000). An all-digital low-power IF GPS synchronizer,
Solid-State Circuits, IEEE Journal of 35(6): 856-864.
OSSISICD (2010). European gnss (galileo) open service signal in space interface control
document.
Parkinson, B. & Spilker, J. (eds) (1995). Global Positioning System: Theory and Applications ,
American Institute of Aeronautics and Astronautics.
Shivaramaiah, N. C. (2004). A Fast Acquisition Hardware GPS Correlator , Master's thesis, Center
for Electronics Design and Technology, Indian Institute of Science, Bangalore, India.
Shivaramaiah, N. C. (2011). Enhanced Receiver Techniques for Galileo E5 AltBOC Signal Processing ,
PhD thesis, School of Surveying and Spatial Information Systems, University of New
South Wales, Sydney, Australia.
Shivaramaiah, N. C. & Dempster, A. G. (2009). Design challenges of a Galileo E1 correlator on
the Namuru platform, IGNSS Symp , Gold Coast, Australia.
Shivaramaiah, N. C. & Dempster, A. G. (2010). On the baseband hardware complexity of
modernized GNSS receivers, IEEE ISCAS , pp. 3565 -3568.
Shivaramaiah, N. C., Dempster, A. G. & Rizos, C. (2009). Application of Prime-factor
and Mixed-radix FFT Algorithms in Multi-band GNSS Receivers, Journal of GPS
8: 174-186.
Zarlink (1999). GPS Receiver Hardware Design Application Note AN4855 , 2.0 edn, Zarlink
Semiconductor.
Zarlink (2001). GPS 12 channel correlator , issue 3.2 edn, Zarlink Semiconductor.