Baseband Hardware Designs in Modernised GNSS Receivers - Global Navigation Satellite Systems: Signal,Theory and Applications - page 42

Signal name Centre frequency

(Typical receiver
bandwidth) in
MHz

Modulation
type

Code length *
(memory code?
Y/N)

Chipping rate
(MHz)

GPS L1 C/A 1575.42 (2) BPSK 1023 (N) 1.023

GPS L2C 1227.6 (2) BPSK CM-20460 (N),

CL- 767250 (N)

1.023

GPS L5 1176.45 (20) BPSK 20460 (N) 10.23

GPS L1C, Galileo
E1, Compass B1

1575.42 (14) MBOC / CBOC 1023 (N), 4096

(Y), **

1.023

Galileo E5,
Compass B2

1191.795 (50) AltBOC 10230 (N), *** 10.23

** Primary code only, *** Yet to be available for the Compass signal
Table 1. Some new GNSS signals and their parameters of interest

1. increased signal bandwidths demand higher sampling frequencies
2. increased spreading code lengths and chipping rates demand higher shift register clock
frequencies,
3. use of multi-level subcarriers, as in the case of AltBOC type of modulation, increases the
number of bits in the local reference signal,
4. use of memory codes demands additional memory to hold the spreading code for all the
satellites, and
5. increased minimum operating frequency of the baseband hardware mainly due to a) and
b)
The operating frequency and the circuit complexity determine the energy efficiency of digital
logic and therefore the design of an efficient baseband logic circuit becomes extremely
important in the context of baseband hardware targeted to process multi-GNSS signals
(Shivaramaiah et al., 2009).

This section discusses the major contributors for the resource utilisation of the correlators for
the new signals. The parameters of the correlator that processes GPS L1 C/A signal are used
as the reference.

4.2 GPS L2C

4.2.1 GPS L2C - CM

The L2C - CM code generation requires a 27-bit shift register instead of the 10-bit code
generator shift register that is used to generate the L1 C/A signal. This in turn increases the
code generator read /write and control register bit-widths. The operating frequency remains
the same and hence any increase in the power consumption is only due to the increase in the
number of shift register bits.

4.2.2 GPS L2C - CM and CL)
The additions to the L2C - CM only correlator are : another 27-bit shift register, another set
of code mixers and accumulators. Since the CM and CL codes are time-multiplexed, the