Digital Signal Processing Reference
In-Depth Information
are Gaussian distributed RVs, and there is no clock skew. When there is a clock skew
between node A and node B, least-squares linear regression is proposed in [18] to esti-
mate the clock skew.
The main advantage of RBS is that by comparing the time stamps of a common packet
at two different nodes, it removes the largest sources of nondeterministic error (send
time and access time) from the transmission path. Thus, RBS provides a high degree of
synchronization accuracy. Note also that RBS can be applied to commodity hardware
and existing software in sensor networks as it does not need access to the low levels of
the operating system.
13.4.1.6 Clock Offset and Skew Estimation Based on Broadcast Clock
Under the setting that a sensor node observes and synchronizes to a broadcast clock,
[30] derives the ML estimator for clock offset and skew with the broadcast message delay
being modeled as uniformly distributed RVs. It is shown that the ML estimate in this
case is generally not unique. Furthermore, the support of the likelihood function is not
convex, which leaves out the possibility of taking the mean of all equally likely solu-
tions. This motivated [30] to consider the linear estimator for the clock offset and skew.
Under the same setting, [31] derives the joint ML clock offset and skew estimator with
the assumption that the broadcast message delays are modeled as exponentially dis-
tributed RVs. It is shown in [31] that a unique joint ML clock offset and skew estimate
exists under certain conditions, as opposed to the case of uniformly distributed delay.
Furthermore, the Gibbs sampler was introduced in [31] to further enhance the perfor-
mance of the joint ML estimator.
13.4.1.7 Flooding Time Synchronization Protocol (FTSP)
In [16], it is argued that if one can time-stamp the message at the MAC layer, this immedi-
ately eliminates three sources of delay uncertainties: transmit, access, and receive times.
In this case, the main delivery delay comes from transmission and reception times at the
radio chips (see section 13.2.3 ) . These delays can be further decomposed into:
1. Interrupt handling time, which is the delay between the radio chip raising and the
microcontroller responding to an interrupt
2. Encoding time, which is the time it takes for the radio chip to encode and trans-
form the message into a radio wave
3. Decoding time, which is the time for the radio chip at the receiver to transform
the radio wave back into binary data
4. Byte alignment time, which is the delay at the receiver to synchronize with the
byte boundary at the physical layer
FTSP [16] uses a single broadcasted message to establish synchronization points
between sender and receivers, while eliminating the jitter of interrupt handling and
encoding/decoding times by utilizing multiple MAC layer time stamps on both the
sender and receiver sides. Furthermore, the skew of the clock between sender and
receiver is estimated using multiple messages and linear regression.
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