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can then determine the transmitted bit pattern.
'1'
'0'
Figure 26.17 Manchester encoding
For Manchester decoding, the Manchester-encoded signal is first synchronised to the re-
ceiver (called bit synchronisation). A transition in the middle of each bit cell is used by a
clock recovery circuit to produce a clock pulse in the center of the second half of the bit cell.
In Ethernet the bit synchronisation is achieved by deriving the clock from the preamble field
of the frame using a clock and data recovery circuit. Many Ethernet decoders use the SEEQ
8020 Manchester code converter, which uses a phase-locked loop (PLL) to recover the clock.
The PLL is designed to lock onto the preamble of the incoming signal within 12-bit cells.
Figure 26.19 shows a circuit schematic of bit synchronisation using Manchester decoding
and a PLL.
The PLL is a feedback circuit which is commonly used for the synchronisation of digital
signals. It consists of a phase detector (such as an EXOR gate) and a voltage-controlled
oscillator (VCO) which uses a crystal oscillator as a clock source.
Bit stream
to be
transmitted
0110111110001
Manchester
encoding
Extracted
receiver
clock
Receiver
bit stream
0110111110001
Figure 26.18 Example of Manchester coding
Received Manchester-encoded signal
PLL
Squelch
Recovered
synchronized
clock
Decoded
data
Figure 26.19 Manchester decoding with bit synchronization
 
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