Information Technology Reference
In-Depth Information
'1'
'0'
T
T
Figure 20.2
WorldFIP bit coding
The frame start sequence (FSS) is illustrated in Figure 20.3, and contains the following
fields:
•
Preamble (PRE) - apredefined pattern of 10101010. This is used to synchronise the
receiving clocks.
•
Frame start delimiter (FSD) - a predefined pattern of 1V
+
V
-
10V
-
V
+
0, which defines the
start of the CAD field. Note that violations (V
+
and V
-
) cannot occur within this field.
•
Control and data (CAD) - contains information on the data link layer.
•
Frame end delimiter (FED) - a predefined pattern of 1V
+
V
-
V
+
V
-
101, which defines the
end of the CAD field.
V
+
0
V
−
CAD
0
1
0
1
0
1
0
1
V
+
V
−
1
0
V
−
V
+
0
1
V
+
V
−
V
+
V
−
1
0
1
1
Preamble
FSD
FED
Figure 20.3
WorldFIP frame
20.3 Data link layer
The data link layer supports two types of service:
•
Exchanges of variables.
•
Message transfers.
