Information Technology Reference
In-Depth Information
Configuration address register
I/O address
0CF8h accessed as a DWord (32-bit)
Default value
00000000h
Access
Read/write
CONFADD is accessed with an 8-bit or a 16-bit value, then it will 'pass through' this regis-
ter and go onto the PCI bus as an I/O cycle. The register contains the bus number, device
number, function number, and register number for which a subsequent configuration access
is intended. Its format is:
Bit
Description
31
Configuration enable (CFGE) 1=enable, 0=disable.
30:24
Reserved.
23:16
Bus number (BUSNUM) - If it has a value of 00h then the target of the
configuration cycle is either the HOST BRIDGE or the PCI bus that is di-
rectly connected to the HOST BRIDGE.
15:11
Device number (DEVNUM) - Selects one agent on the PCI bus selected by
the bus number. In the configuration cycles this field is mapped to
AD[15:11].
10:8
Function number (FUNCNUM) - This field is mapped to AD[10:8] during
PCI configuration cycles. It allows for the configuration of a multifunction
device.
7:2
Register number (REGNUM) - This field selects one register within a par-
ticular bus, device, and function as specified by the other fields in the con-
figuration address register. This field is mapped to AD[7:2] during PCI
configuration cycles.
1:0
Reserved.
Configuration data register
I/O address
0CFCh
Default value
00000000h
Access
Read/Write
CONFDATA is a 32-bit/16-bit/8-bit read/write window into configuration space. The portion
of configuration space that is referenced by CONFDATA is determined by the settings in the
CONFADD register.
11.8.2 Configuration access
The routing of configuration accesses to PCI or AGP is controlled by PCI-to-PCI bridge
standard mechanism using the following:
•
Primary bus number register.
•
Secondary bus number register.
•
Subordinate bus number register.
The PCI bus 0 is frequently known as the primary PCI.
.
