Information Technology Reference
In-Depth Information
•
Message
. The message phase covers both the message out and message in phase. The
first byte transferred in either of these phases can be either a single-byte message or the
first byte of a multiple-byte message. Multiple-byte messages are completely contained
within a single message phase.
•
Status
. The status phase allows the target to request that status information be sent from
the target to the initiator. The target shall assert the
C/D
and
I/O
signals and negate the
MSG
signal during the
REQ
/
ACK
handshake of this phase.
Typical times are:
•
Arbi
trati
on delay, 2-4
s. This is the minimum time that a SCSI device waits from assert-
ing
BSY
for arbitration until the data bus can be examined to see if arbitration has been
won.
µ
•
Power-on to selection time, 10 s. This is the maximum time from power start-up until a
SCSI target is able to respond with appropriate status and sense data.
•
Selection abort time, 200
s. This is the maximum time that a target (or initiato
r) ta
kes
from its most recent detection of being selected (or reselected) until asserting a
BSY
re-
sponse. This is required to ensure that a target (or initiator) does not assert
BSY
after a se-
lect (or reselection) phase has been aborted.
µ
•
Sele
ction time-out delay, 250ms. The minimum time that a SCSI device should wait for a
BSY
response during the selection or reselection phase before starting the time-out pro-
cedure.
•
Disc
onnection delay, 200
s. The minimum time that a target shall wait after releasing
BSY
before participating in an arbitration phase when honouring a disconnect message
from the initiator.
µ
•
Reset hold time, 25
µ
s. The minimum time for which
RST
is asserted.
The signals
C/D
,
I/O
, and
MSG
distinguish between the different information transfer
phases, as summarised in Table 7.5 (where a 1 identifies an active signal and a 0 identifies a
false signal). The target drives these three signals and therefore controls all chang
es fr
om one
phase to another. The initiator can request a message out phase by asserting the
ATN
signal,
while the target can cause the bus free phase by releasing the
MSG
,
C/D
,
I/O
, and
BSY
signals.
Table 7.5
Information transfer phases
C/D
I/O
Phase
Direction
MSG
0
0
0
Data out
Initiator
→
target
0
0
1
Data in
Initiator
←
target
0
1
0
Command
Initiator
→
target
0
1
1
Status
Initiator
←
target
1
0
0
-
-
1
0
1
-
-
1
1
0
Message out
Initiator
→
target
1
1
1
Message in
Initiator
←
target
