Information Technology Reference
In-Depth Information
Bit 30-24
Reserved.
Bit 23-16
PCI bus number. Defines the number of the number of the PCI bus (to a
maximum of 256).
Bit 15-11
PCI unit. Selects a PCI device (to a maximum of 32). PCI thus supports
a maximum of 256 attached buses with a maximum of 32 devices on
each bus.
Bit 10-8
PCI function. Selects a function within a PCI multifunction device (one
of eight functions).
Bit 7-2
Register. Selects a Dword entry in a specified configuration address
area (one of 64 Dwords).
Bit 1, 0
Type. 00 - decode unit, 01 - CONFIG_ADDRESS value copy to AD x .
Configuration mechanism 2
In this mode, each PCI device is mapped to a 4 KB I/O address range between C000h and
CFFFh. This is achieved by used in the activation register CSE (configuration space enable)
for the configuration area at the port address 0CF8h. The format of the CSE register is lo-
cated at 0CF8h and is defined as
Bit 7-4
Key. 0000 - normal mode, 0001…1111 - configuration area activated.
A value other than zero for the key activates the configuration area
mapping, that is, all I/O addresses to the 4 KB range between C000h
and CFFFh would be performed as normal I/O cycles.
Bit 3-1
Function. Defines the function number within the PCI device (if it
represents a multifunction device).
Bit 0
SCE. 0 defines a configuration cycle, 1 defines a special cycle.
The forward register is stored at address 0CFAh and contains
Bit 7-0
PCI bus.
The I/O address is defined by:
Bit 31-12 Contains the bit value of 0000Ch.
Bit 11-8 PCI unit.
Bit 7-2
Register index.
Bit 1, 0
Contains the bit value of 00 (binary).
4.6.1 Sample test program
PCI bridge test
An example BASIC program to test the PCI bridge device is given next.
2 Program 4.1
130 Print "Host PCI bridge test"
160 Print " PCI Configuration Address &80000000": Print
170 IOWRITE &CF8,2,&80000000
180 IOREAD &CFC,2
190 IF B1<>&10000E11 THEN GOTO 410
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