Testing - CAN System Engineering - page 331

bench 18 cannot actively 19 be either controlled nor its structure be manipulated from
outside while the simulation is ongoing. Therefore, the executing simulator is not
able to address and control the UT and LT of the test system coded in VHDL-AMS
modelling language. This fundamental statement is of important significance when
recognizing the continuously ongoing transition from test system for real, physi-
cal systems towards model-based testing. The major difference to a non-simulation
based test-system implementation is that an additional device level is inserted be-
tween the test coordination and the IUT when applying a simulator. This implies
that the device models of the UT and LT no longer can be addressed directly. In-
sofar, also the test coordination—with its main responsibility to perform the test
sequence control and which, therefore, is defined as a set of sequences of statements
for the devices of the UT and LT—cannot be completely performed from outside
of the simulator. That is why test scripts containing TC-specific model parameters
must be provided to the test bench. Therefore, a solution is required for the integra-
tion of the test sequence control into the model description.

6.5.2.1 Integration into Models

There are various versions and integration levels. In a first version, all the complete
test coordination is integrated into the model. This implies that any required pro-
cedures which are needed for test coordination must be converted into the model
description. In this case enormous efforts are required for the parameterization and
the complexity of the model, especially with regard to measurement data evaluation
and test-report generation. This is feasible due to the VHDL-AMS feature to read
and write external data from and to a host system. Any interfacing to real tests is
difficult though, because existing test scripts cannot be applied as they are, they first
must be converted into model descriptions. In this version, a test script simply is
a configuration in the VHDL-AMS language, which parameterizes the individual,
modeled components of the test system and links TC-specific implementations to
the interfaces of the components (see Fig. 6.13 ).

6.5.2.2 Integration Outside the Simulator

In the second version, the measurement data evaluation and test report generation
are outside of the model descriptions. As such, validated functionalities of existing
test systems can be applied. Interfacing to those physical test systems therefore can
be easily done. Furthermore, this integration version allows adopting test from the
physical tests scripts for the devices control of UT and LT. This also supports the
comparability of virtual and physical tests. On one hand, this may bare the poten-

18 Top-level model description of a simulation.
19 By external programs through the simulator or by the simulator itself.