Civil Engineering Reference
In-Depth Information
For solutions comparable to the basic CAN architecture, there are different im-
plementations to be checked such as transmit buffer registers with/without internal
prioritization, different write capabilities onto the transmit register queue which in-
fluence heavily the overall arbitration process and thus the latency times of message
transfers, etc. Concerning CAN solutions comparable to the full CAN architecture,
specifically adapted checks must be executed to test the individual solution of struc-
ture and number of transmit and receive registers, the kind of masking capabilities,
the access techniques to the registers, etc. There are various solutions for the status
and control registers which must be checked such as receive/transmit error coun-
ters, time stamps, transmission success checks, interrupts, non-unified position and
definition of status/control bits and so on.
6.3.3.3
The Robustness Test Types
According to the ISO 9646 standard, a test suite usually consists of short determin-
istic TCs whereas each TC focuses only on a particular function of the protocol.
This approach neglects the complex interaction between various state machines of
the implementation. When checking a state machine, it is not sufficient to check
each of the various paths individually only. The behaviour of a state machine is
dependent on the sequential order of the paths too. Therefore, these dependencies
ought to be checked, also in CAN devices, in order to ensure their compliance to
the CAN standard.
Therefore, C&S Group has done many efforts to develop generic robustness tests
verifying the correctness of the implementation under various bus loads and during
a long period of time. As the number of combinations of sequential paths in CAN
is very large, these test sequences are generated randomly. These robustness tests
cover implementation problems like clock skew due to critical timing, sporadic
errors occurring only under very particular conditions and other protocol or proces-
sor-interface problems not covered by the limited scope of the deterministic TCs.
The test sequences typically run for hours up to a couple of days, depending on
the complexity of the CAN device and the number of correspondingly required tests
cases. There are various parameters modified while producing the sequential order
of “standard” and “extended” TCs such as random generation of identifiers with
standard or extended length and coding, random length and random content of data,
various baud rates, very high bus load such as ~100 % and ≥ 50 %, with/without er-
rors, etc. All the tests are executed in real time. The verification of the tests is done
in real time at message level.
6.3.3.4
Characteristics of the Robustness Test
• Bus Load
Each robustness test is executed at ≤ 100 % bus load. The maximal baud rate used to
run the tests at 100 % bus load depends on the computing power of the UT. The UT
