Civil Engineering Reference
In-Depth Information
Fig. 3.23
LogiCORE
3.5.5.5
Component Name
Base name of the output files generated for this core. The name must begin with a
letter and be composed of the following characters: a-z, A-Z, 0-9, and “-”.
3.5.5.6
Xilinx CAN Controller Design Parameters
To obtain a CAN controller that is uniquely tailored to the minimum system require-
ments, certain features can be parameterized. This results in a design that utilizes
only the resources required and gives the best possible performance. The features
that can be parameterized in the CAN controller are shown in Table
3.3
. The in-
terface parameters C_BASEADDR and C_HIGHADDR need to be specified only
when the core is interfaced to the OPB IPIF. For the core generated by CoreGen,
C_BASEADDR defaults to X”00000000”. C_HIGHADDR parameter does not
exist for CoreGen cores.
Number of Acceptance Filters
Valid range is from 0 to 4. This specifies the number
of acceptance filter pairs used by the CAN controller. Each acceptance filter pair
consists of a mask register and an ID register. These registers can be configured so
that a specific Identifier or a range of Identifiers can be received. This determines
the value of C_CAN_NUM_ACF.
TX FIFO Depth
Valid values: 2, 4, 8, 16, 32, 64. This configures the depth of the
TX FIFO.
The TX FIFO depth is measured in terms of the number of CAN packets. For exam-
ple, TX FIFO with a depth of 2 can hold at most two CAN packets. This determines
the value of C_CAN_TX_DPTH.
