SIGNAL SOURCES FOR SIMULATION, TESTING, AND CALIBRATION - Design and Development of Medical Electronic Instrumentation - page 263

Figure 6.11 The address generator of the arb is formed by a chain of synchronous counters. Upon reaching the end address, the address
generator resets, and the next data latched corresponds to that of the first RAM address. For nonvolatile operation, the RAMs should be
mounted on Dallas Semiconductor's DS1213D SmartSockets.

the chain of IC16-IC19. The register's contents are then shifted out of IC16 into one of the
status input lines of the printer port (pin 10 of J4).
As shown in Figure 6.14, two di erent DACs can be used with the arb. An Analog

Devices AD9713 high-speed ECL DAC capable of updating its output at up to
100 megasamples(MS)/s can restore high-frequency signals with high resolution.
Alternatively, the lower-cost AD667 provides more limited performance for applications
which require DAC writing speeds of no more than 300 kilosamples/s. Unfortunately, it is
di

ff

cult to take full advantage of the AD9713s, since when using these high-speed DACs,
the arb's speed will be limited by the RAMs' access time. Under the direct addressing archi-
tecture used by this arb, RAMs with 50 ns access time will allow a maximum writing speed
of 1/50

20 MS/s. Achieving 100-MS/s writing speeds would require 10-ns
RAMs, which although available (e.g., cache RAM), are very costly, limited in size, and
generally power-hungry.

10 9 s