Biomedical Engineering Reference
In-Depth Information
the chassis. Of course, the level of coupling must fall well within the amount of enclosure
leakage permitted for the
fl
floating part.
Pulse Reflection and Termination Techniques
In a typical circuit, a driving logic element and a receiving logic element are connected by
a PCB track. In the equivalent circuit shown in Figure 4.36, a pulse with amplitude V d is
injected by the driver logic element, which presents an output impedance Z d into a PCB
track of length l t and impedance Z t . The pulse carried by the PCB track is then presented
to the input impedance Z r of the receiving element. If we suppose that a Z t
track
carries the pulse, and after looking at the data sheets for a selected 5-V family of high-
speed logic, we
100
fi
find that the output and input impedances at our frequency of interest are
Z d
ected pulse
starts traveling back toward the driver with amplitude that can be approximated by
50
and Z r
10 k
, respectively, then upon reaching the receiver, a re
fl
Z
Z
Z
Z
1
1
0
0
,
,
0
0
0
0
0
1
1
0
0
0
0
r
t
t
V r
V d
(5 V)
4.9 V
which assumes a negligible attenuation of the pulse throughout its conduction, and which
takes into consideration only the real parts of the variables. This re
fl
ected pulse will be
rere
ected back toward the receiver upon hitting the driver with an amplitude approxi-
mated by
fl
Z
Z
Z
5
0
0
1
0
1
0
d
t
V r Z
V r 5
(4.9 V)
1.63 V
0
0
d
t
This negative signal will interact with the original incident pulse with a delay equiv-
alent to the time it takes for the pulse to travel back and forth along the track
τ
(ns)
0.31 t r .
Depending on the length of the PCB track, the
ection could distort the
leading edge of the pulse so much that it will cause the false detection of a logic-low
(Figure 4.37). A di
1.63-V re
fl
ff
erent combination of impedances could have caused the re
fl
ected pulse
V d
I t
PCB Track
Z
Z
d
r
Z t
GND Plane
Driver
Receiver
Figure 4.36 The output of a logic element connected through a PCB track to the input of another
logic element can be modeled as an ideal voltage step generator that drives a transmission line of
impedance Z t through an output impedance Z d . The transmission line is then terminated by the
receiver's input impedance Z r .
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