DESIGN OF SAFE MEDICAL DEVICE PROTOTYPES - Design and Development of Medical Electronic Instrumentation - page 122

' Leave program
' -------------
OUT prinop, 0 ' clear printer port

SCREEN 0 ' return to text mode screen

END

acquire:
'
' Acquisition loop
' ----------------
OUT prinop, selas selbs ' keep CS' deasserted

selcs notcs
convert:
OUT prinop, selas selbs selcs ' convert by asserting CS'

loop1:
bit (INP(prinstat) AND 64) / 64

' read status port and filter DOUT

IF bit 0 THEN GOTO loop1 ' wait for EOC signal

dat 0 ' clear A/D accumulator

FOR clocknum 11 TO 0 STEP -1 ' clock 12 bits serially

OUT prinop, selas selbs ' clock pulse rising edge

selcs sclk
OUT prinop, selas selbs selcs

' clock pulse falling edge

bit (INP(prinstat) AND 64) / 64 ' read status port and filter DOUT

dat dat (2 ^ clocknum) * bit ' accumulate from bit 11 to bit 0

NEXT clocknum ' next bit

OUT prinop, selas selbs ' one more clock to reset A/D

selcs sclk
OUT prinop, selas selbs selcs
OUT prinop, selas selbs ' deassert CS'

selcs notcs
vout dat * .001

' translate A/D data to Volts

RETURN

The program is presented only as an example and for the sake of simplicity will run the
A/D converter as fast as the PC is able to drive its lines. Sampling rate control could be
implemented either by inserting for-to loops adaptively to introduce controlled delay
between samples [Prutchi, 1996] or by controlling the acquisition process from interrupts
generated by high-resolution hardware timing [Ackerman, 1991-1992; Schulze, 1991].
The actual acquisition subroutine starts by setting up the multiplexer while keeping
*CS deasserted. Conversion for the channel selected is then initiated by asserting *CS
and polling for the end-of-conversion signal before attempting to read the conversion
data. At this point, the A/D accumulator variable is cleared, and each of the 12 bits is
clocked-in serially. The value of each bit is read from the status port and is multiplied by
the decimal value of its binary position before being accumulated. Finally, one more
clock pulse is inserted to reset the A/D, the *CS line is deasserted, and A/D data are trans-
lated to volts.

ISOLATED ANALOG MULTIPLEXER

The number of channels that can be acquired through the isolated A/D can be expanded
by using additional multiplexers. Figure 3.17 shows a PCB that implements a 64-channel