Cryptography Reference
In-Depth Information
Table 6.4
Detection capability for random errors (multiplicity 1 to 64 bits) injected into the 128-bit
state matrix
Error
multi-
Percentage of the undetected errors
plicity
Parity
for State
Parity for
State +
Parity per
byte
Parity per
byte +
CRC for
State
double parity
for S-Box
double
parity
for
S-Box
1
12.85
0
0
0
0
2
86.09
85.93
5.41
4.71
1.37
3
12.37
0
0
0
0.01
4
86.58
86.25
0.80
0.66
0.18
5
12.69
0
0
0
0.003
6
86.43
86.42
0.20
0.15
0
7
12.40
0
0
0
0
8
86.26
86.18
0
0
0
9
12.37
0
0
0
0
10
85.95
86.05
0
0
0
20
86.19
86.3925
0
0
0
21
12.4425
0
0
0
0
30
86.095
86.275
0
0
0
31
12.685
0
0
0
0
40
86.23
86.14
0
0
0
41
12.41
0
0
0
0
50
86.1925
86.2325
0
0
0
51
12.4425
0
0
0
0
60
86.1575
86.255
0
0
0
61
12.4
0
0
0
0
64
86.3475
86.2775
0
0
0
double parity for S-Box” [120,424]) allows all the errors of odd multiplicity to be
detected at the price of larger area overhead.
6.5 Faults and Errors
In the previous section, the code-based detection schemes were evaluated in terms of
error detection capabilities. The errors were injected at different spatial and temporal
positions in the State matrix. However, this information is not sufficient for evaluating
the real strength of the detection schemes when a physical-induced fault is actually
disturbing the circuit. Such faults may affect logic signals during execution of any
encryption operation, thus resulting in different error profiles (i.e. different error
multiplicities on the State matrix).
