Digital Design of Communication Systems - Digital Design of Signal Processing Systems: A Practical Approach - page 560

Figure 13.37 (49,16) block turbo code formulation by combining (7,4) (7,4) codes

the interfaces and the memory blocks. The BTC starts encoding the data once enough bits are
available in AES out-memory which is filled by the AES engine of Section 13.3.3. The size is easily
calculated using the read and write pointers of the FIFO controller of AES out-memory. The BTC
reads the input data and keeps the intermediate results in its internal memory, and finally the output is
written to BTC out-memory.

Table 13.1 Options for block turbo code for supporting different code rates

Mode number Input block

dimensions

Input
block size

Output block
dimensions

Output
block size

Code
rate

Rows Columns K Rows Columns n k/n

4 11 11 121 16 16 256 0.47

1 11 26 286 16 32 512 0.55

2 11 57 627 16 64 1024 0.61

9 26 11 286 32 16 512 0.55

5 26 26 676 32 32 1024 0.66

3 26 57 1482 32 64 2048 0.72

10 57 11 627 64 16 1024 0.61

11 57 26 1482 64 32 2048 0.72

6 57 57 3249 64 64 4096 0.79