CORDIC-based DDFS Architectures - Digital Design of Signal Processing Systems: A Practical Approach - page 516

thetaQ = theta/2^(N-1); % 16-bit quantized theta in floating point format
% separating bits of theta as
% b=b[1],b[2],....,b[N]
for k=1:N
b(N+1-k) = rem(theta, 2);
theta = fix(theta/2);
end
%compute index for M = 4;
index=b(1)*2^3 + b(2)*2^2 + b(3)*2^1 + b(4)+1;
x4 = table(index,1); y4 = table(index,2);
% recoding b[M+1],b[M+2],...,b[n] as r-> +1,-1
for k=5:N
r(k) = 2*b(k) - 1;
end
% computing const2 for all values of i and j
% i+j < =P
sum = 0;
for i=5:7;
for j=i+1:P-i
k = i+j;
sum = sum + r(i)*r(j)*2^(-k);
end
end
const2 = 1 - sum;
const1 = 0;
for k=M+1:N
const1= const1+r(k)*2^(-(k));
end
% single stage modified CORDIC butterfly
xK = const2 * x4 - const1 * y4;
yK = const1 * x4 + const2 * y4;
% arrays for recording single state, quantized and double precision
% results for final comparision
cosSSC = [cosSSC xK]; sinSSC = [sinSSC yK];
cosD = [cosD cos(thetaQ)]; sinD = [sinD sin(thetaQ)];
cosQ = [cosQ (round(cos(thetaQ)*2^14)/2^14)]; sinQ = [sinQ
(round(sin(thetaQ)*2^14)/2^14)];
end
% computing mean square errors, Single Stage CORDIC performs better
MSEcosQ = mean((cosQ-cosD).^2); % MSEcosQ = 3.0942e-010
MSEcosSSC = mean((cosSSC./2^16-cosD).^2) % MSEcosSSC = 1.3242e-010
MSEsinQ = mean((sinQ-sinD).^2); % MSEsinQ = 3.1869e-010
MSEsinSSC = mean((sinSSC./2^16-sinD).^2); % MSEsinSSC = 1.2393e-010
MSEcosQ MSEcosSSC]
MSEsinQ MSEsinSSC]
The code is mapped in hardware for optimal implementation of the CORDIC algorithm. Verilog
code of the design is given here (the code can be further optimized by using a compression tree for
computing const2):