CORDIC-based DDFS Architectures - Digital Design of Signal Processing Systems: A Practical Approach - page 510

x(k) = x(k-1) - r(k)* 2^(-k) * y(k-1);
y(k) = y(k-1) + r(k) * 2^(-k) * x(k-1);

end

% For plotting, convert the values of x and y to
floating point format
cosine = [cosine x(k)/(2^(P-2))];
sine = [sine y(k)/(2^(P-2))];

end

This modification results in simple fully parallel and time-shared HW implementations. The
fully parallel architecture is shown in Figure 12.17. The architecture can also be easily
pipelined.
These iterations can also be merged together to be reduced using a compression tree for effective
HWmapping [9]. Amerged cell that takes partial-sumand partial-carry results from state (i

1) and
thengeneratespartial results for iteration iwhileusinga5:2compression tree is shown inFigure12.18.
For the time-shared architecture, multiple CEs can be used to fold the architecture for any desired
folding factor.

12.5.2 Hardware Optimization
In many applications the designer may wish to explore optimization above what is apparently
perceived from the algorithm. There is no established technique that can be generally used, but
a deep analysis of the algorithm often reveals novel ways of optimization. This section
demonstrates this assertion by presenting a novel algorithm that computes the sine and
cosine values in a single stage, thus enabling zero latency with very low area and power
consumption [10].
Consider a fixed-point implementation of the modified CORDIC algorithm. As the iterations now
do not depend on values of D i , the values of previous iterations can be directly substituted into the

current iteration. If we consider M ¼ 4, then indexing into the tables gives the values of x 4 and y 4 .
Now these values are used to compute the iteration for i

¼ 5 as:

x 5 ¼ x 4 r 5 2 5

y 4 ð 12 : 21a Þ

y 5 ¼ r 5 2 5 x 4 þ y 4 ð 12 : 21b Þ

The iteration for i ¼ 6 calculates:

x 6 ¼ x 5 r 6 2 6

y 5

y 6 ¼ r 6 2 6

x 5 þ y 5

Now substituting expressions for x 5 and y 5 from (12.21) in the above expressions, we get:

x 4 r 5 2 5 y 4

r 5 r 6 2 11 þ r 6 2 6

x 6 ¼ 1

x 4 þ 1 r 5 r 6 2 11 y 4

y 6 ¼ r 5 2 5 þ r 6 2 6