Micro-programmed State Machines - Digital Design of Signal Processing Systems: A Practical Approach - page 438

from IR

loop inst 1 0

PC From IR

-

N N

L 1

Loop_ start_ addr_ reg Loop_ end_ addr_ reg Loop_ counter_ reg

en_loop en_loop en

N

N

PC N

OR NOR

Comparator

en_loop

Loop count
zero

1

loop_end_addr flag

1

to next addr logic

loop_end_inst

to next addr logic

count is not 0

loop_end_flag

Figure 10.18 Loop machine to support a single loop instruction

the loop start-address on the PMaddress bus and the state machine starts executing the next iteration
of the loop. When the PC gets to the last micro-code in the loop and the down count is zero, the next-
address select logic starts executing the next instruction in the program. Figure 10.18 shows the loop
machine for supporting a single loop instruction.
To provide nested loop support, each register in the loop machine is replaced with a LIFO stack
with unified stack pointer logic. The stacks store the loops' start-addresses, end-addresses and
counters for the nested loops and output the values for the currently executing loop to the loop control
logic. When the current loop finishes, the logic selects the outer loop and in this way it iteratively
executes nested loops.
An example of nested loops that correspondingly fill the LIFO registers is given in Figure 10.19.
The loop machine supports four nested loops with three sets of LIFOs for managing loops start-

23
24 repeat (5) 35
25
26 repeat (10) 35
27
28
29 repeat (20) 34
30
31 repeat (12) 33
32
33
34
35

Loop start
addr

Loop end
addr

Loop count

25
27

35
35

5
10

30
32

34
33

20
12

(a) (b)

Figure 10.19 Filling of the LIFOs for the four nested loops. (a) Instruction addresses and nested loop
instructions. (b) Corresponding filling of the LIFO registers