Micro-programmed State Machines - Digital Design of Signal Processing Systems: A Practical Approach - page 432

1

+

addr

Microprogram Memory

N

0

cond 0
cond 1

data bus

M

branch
addr

cond
sel

cntr
signals

N

1

2

to datapath

from datapath

Figure 10.10 Micro-PC-based design

Figure 10.10 shows an example. The next_addr_mux selects the address to themicro-program
memory. For normal execution, cond_mux selects 0. The output from cond_mux is used as the
selected line to next_addr_mux . Then, mirco_PC and branch_addr are two inputs to
next_addr_mux . A zero at the selected line to this multiplexer selects the value of micro_PC
and a 1 selects the branch_addr to addr_bus . The addr_bus is also input to the adder that
adds 1 to the content of addr_bus . This value is latched in micro_PC in the next clock cycle.

10.3.5 Register-based Machine with Parity Field

A parity bit can be added in the micro-code to expand the conditional branching capability of the
state machine of Figure 10.10. The parity bit enables the controller to branch on both TRUE and
FALSE states of conditional inputs. If the parity bit is set, the EXOR gate inverts the selected
condition of cond_mux , whereas if the parity bit is not set the selected condition then selects the
next_addr to the micro-program memory.
A controller with a parity field in themicro-code is depicted in Figure 10.11. The parity bit is set to
0 with the following micro-code:

if (cond_0) jump to label

The parity bit is set to 1 with the following micro-code:

if(!cond_0) jump to label

10.3.6 Example to Illustrate Complete Functionality
This example (see Figure 10.12) illustrates the complete functionality of a design based on a micro-
programmed statemachine. The datapath executes operations based on the control signals generated