Digital Signal Processing Reference
In-Depth Information
7.7 Polyphase Structure for Decimation and
Interpolation Applications
The sampling rate change is very critical in many signal processing applications. The front end of a
digital communication receiver is a good example. At the receiver the samples are acquired at a very
high rate, and after digital mixing they go through a series of decimation filters. At the transmitter the
samples are brought to a higher rate using interpolation filters and then are digitally mixed before
passing the samples to a D/A converter. A polyphase decomposition of an FIR filter conveniently
architects the decimation and interpolation filters to operate at slower clock rate [12].
For example, a decimation by D filters computes only the Dth sample at an output clock that is
slower by a factor of D than the input data rate. Similarly, for interpolation by a factor of D,
theoretically the first D
1 zeros are inserted after every sample and then the signal is filtered using
an interpolation FIR filter. The polyphase decomposition skips multiplication by zeros while
implementing the interpolation filter.
The polyphase decomposition achieves this saving by first splitting a filter with L coefficients into
D sub-filters denoted by e k [n] for k ¼ 0 ... D 1, where:
D 1
h½¼
0 e k ½ where e k ½¼h½nDþk
ð 7 : 13 Þ
By simple substitution the desired decomposition is formulated as [13]:
HðÞ¼h 0 þ h D z D þ h D z 2 D þ ...
þ h 1 z 1
þ ...
þ h 1 z 1
ð
Þ
þ h 2 1 z 2 1
ð
Þ
þ h 2 z ðDþ 2 Þ þ h 2 2 z ð 2 2 Þ þ ...
þ h 2 z 2
. . . .
þ h D 1 z ðD 1 Þ þ h 2 D 1 z ð 2 D 1 Þ þ h 3 D 1 z ð 3 D 1 Þ þ ...
Regrouping of the expressions results in:
HðÞ¼h 0 þ h D z D þh 2 D z 2 D þ ...
þ z 1
h 1 þh 1 z D þ h 2 1 z 2 D þ ...
ð
Þ
h 2 þh 2 z D þ h 2 2 z 2 D þ ...
þ z 2
ð
Þ
. . . .
þ z ðD 1 Þ h D 1 þh 2 D 1 z D þh 3 D 1 z 2 D þ ...
ð
Þ
zðÞþ ... þ z D 1
¼ E 0 zðÞþz 1
zðÞþz 2
ð
Þ
zðÞ
E 1
E 2
E D 1
In closed form H(z) is written as:
D 1
0 z k E k ðz D Þ
HðÞ¼
ð 7 : 14 Þ
This expression is the polyphase decomposition. For decimation and interpolation applications,
H(z) is implemented as D parallel sub-systems z k E k (z D ) realizing (7.14), as shown in Figure 7.30.
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