Digital Signal Processing Reference
In-Depth Information
18
DATA-1
BUFFER
36
X
COEFFICIENT 1
BUFFER
18
18
ADDER
DATA 2
BUFFER
36
X
COEFFICIENT-2
BUFFER
18
37
ADD-
ACCUMULATE
CIRCUIT
SUMMATION
UNIT
18
DATA-3
BUFFER
36
X
COEFFICIENT-3
BUFFER
18
ADDER
18
DATA-4
BUFFER
36
X
COEFFICIENT-4
BUFFER
18
(b)
16
ABUS
16
BBUS
88
16
16
ADD
REGISTER
MULTIPLY
3
CBUS
17
RBUS
INSTRUCTION
FIFOs
RAM
(c)
18
36
A
B
18 x18 bit
multiplier
18
(d)
Figure 5.1
(Continued)
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