Mapping on Fully Dedicated Architecture - Digital Design of Signal Processing Systems: A Practical Approach - page 152

e 2

e 1

A B C

e 3

Figure 4.17 Hypothetical DFG with three nodes and three edges

Each node in the graph may represent an atomic operation like multiplication, addition or
subtraction. Alternatively, each node may coarsely define a computational block such as FIR filter,
IIR filter or FFT. In these design instances, a predesigned library for each node may already exist.
The designer needs to exactly compute the throughput for each node and the storage requirement
on each edge. While mapping a cascade of these nodes to HW, a controller can be easily designed
or automatically generated that synchronizes the operation of parallel implementation of these
nodes.
A hypothetical DFG is shown in Figure 4.17, where each node represents a computational block
defined at coarse granularity and edges represent connectivity and precedence of operation. For
HW mapping, appropriate HW blocks from a predesigned library are selected or specifically
designed with a controller synchronizing the nodes to work in lock step for parallel or sequential
implementation.
Figure 4.18 shows the scope of different sub-classes of graphical representations. These
representations are described in below sections. The designer needs to select, out of all these
representations, an appropriate representation to describe the signal processing algorithm under
consideration. The KPN is the most generalized representation and can be used for implementing
a wide range of signal processing systems. In many design instances, the algorithm can be defined
more precisely at a finer level with details of number of cycles each node takes to execute its
computation and the number of tokens it consumes at firing, and as a result the number of tokens it
produces at its output edges. These designs can be represented using cyclo-static DFG (CSDFG),
synchronous DFG (SDFG) and homogenous SDFG (HSDFG) - in reducing order of generality.

Kahn Process Network

DDFG

CSDFG

SDFG

HSDF

Figure 4.18 Scope of different subclasses of graphical representation, moving inward from the most
generalized KPN to dynamic DFG (DDFG), to CSDFG, to SDFG, and ending at the most constrained
HSDFG