Mapping on Fully Dedicated Architecture - Digital Design of Signal Processing Systems: A Practical Approach - page 139

Confining the buffers of the FIFOs to minimum size without affecting the performance of the
network is a critical problem attracting the interest of researchers. A few solutions have been
proposed [4, 5].
The KPN can also be implemented in software, where each process executes in a separate thread.
The process, in a sequence of operations, waits on a read from a FIFO and, when the FIFO has
enough samples, the thread performs a read operation and executes. The results are written into
output FIFO. The KPN also works well in the context of mapping of a signal processing algorithm
on reconfigurable platforms.
4.4.2 KPN for Modeling Streaming Applications
To map a streaming application as a KPN, it is preferable to first implement the application in a
high-level language. The code should be broken down into distinguishable blocks with clearly
identified streams of input and output data. This formatting of the code helps a designer to map
the design as a KPN in hardware. The MATLAB code below implements a hypothetical
application:
N = 4*16;
K = 4*32;
% source node
for i=1:N
for j=1:K
x(i,j)= src_x ();
end
end
% processing block 1
for i=i:N
for j=1:K
y1(i,j)=func1(x(i,j));
end
end
% processing block 2
for i=1:N
for j=1:K
y2(i,j)=func2(y1(i,j));
end
end
% sink block
m=1;
for i=1:N
for j=1:K
y(m)=sink (x(i,j), y1(i,j), y2(i,j));
m=m+1;
end
end