System Design Flow and Fixed-point Arithmetic - Digital Design of Signal Processing Systems: A Practical Approach - page 116

precision output precision

e=2 e=2-2=0

0000_0110_1100
0000_1110_1010
0000_1100_1011
0000_1111_0110
0000_1010_1000
0000_0000_1001
0000_1101_1001
0000_1110_1111

0001_1011
0011_1011
0011_0011
0011_1110
0010_1010
0000_0010
0011_0110
0011_1100

01000101
11110001
01101001
11111101
00111101
00111001
01111010
00000010

0001_0001
1111_1100
0001_1010
1111_1111
0000_1111
0000_1110
0001_1111
0000_0001

e=2 e=2-2=0

(b)

x[0]

0000 _0110_1100 0001_1011 01000101 0001_0001

W N 0

0000 _1110_1010 0011_1011 x[4] 11110001 1111 _1100

-1

W N 0

x[2]

0000 _1100_1011 0011_0011 01101001

0001_1010

-1

W N 0

W N 2

0000 _1111_0110 0011_1110 11111101 1111 _1111

x[6]

Block
floating
point

Block
floating
point

-1

-1

0000 _1010_1000 0010_1010 x[1] 00111101 0000_1111

W N 0

0000 _0000_1001 0000_0010 00111001

0000_1110

x[5]

-1

W N 0

0000 _1101_1001 0011_0110 01111010 0001_1111

x[3]

-1

W N 2

0000 _1110 _1111 0011_1100

W N 0

00000010 0000_0001

x[7]

-1

-1

Figure 3.23 FFT butterfly structure employing block floating-point computation while keeping the bit growth issue in perspective