System Design Flow and Fixed-point Arithmetic - Digital Design of Signal Processing Systems: A Practical Approach - page 107

short h16[SIZE] = {8454, -10125, -23069, 3932};
short x16[SIZE] = {-6492, -24999, 18811, 4318};
The following C code implements the same functionality in fixed-point format assuming short
and int are 16-bit and 32-bit wide, respectively:
int dp_32(short x16[], short h16[], int size)
{
int prod32;
int acc32;
int tmp32;
int i;
acc32 = 0;
for( i = 0; i < size; i++ )
{
prod32 = x16[i] * h16[i]; // Q2.30 = Q1.15 * Q1.15
if (prod32 == 0x40000000)// saturation check
prod32 = MAX_32;
else
prod32 = 1; // Q1.31 = Q2.31 1;
tmp32 = acc32 + prod32; // accumulator
// +ve saturation logic check
if( ( (acc32>0)0 ) )
acc32 = MAX_32;
// Negative saturation logic check
else if( ( (acc32 < 0)&&(prod32 < 0) )&&( tmp32 > 0))
acc32 = MIN_32;
// The case of no overflow
else
acc32 = tmp32;
}
}
As is apparent from the C code, fixed-point implementation results in several checks and format
changes and thus is very slow. In almost all fixed-point DSPs the provision of shifting out redundant
sign bits in cases of sign multiplication and checking of overflow and saturating the results are
provided in hardware.
3.5.10 Rounding the Product in Fixed-point Multiplication
The following C code demonstrates complex fixed-point multiplication for Q1.15-format numbers.
The result is rounded and truncated to Q1.15 format:
typedef struct COMPLEX_F
{
short real;
short imag;
}
COMPLEX_F;
COMPLEX_F ComplexMultFixed (COMPLEX_F a, COMPLEX_F b)