System Design Flow and Fixed-point Arithmetic - Digital Design of Signal Processing Systems: A Practical Approach - page 90

Therefore the two's complement implementation of an N-bit positive number is equivalent to the
(N 1)-bit unsigned value of the number. In this representation, 0 is considered as a positive number.

The range of positive numbers that can be represented in N bits is from 0 to (2 N 1 1).
For negative numbers, theMSB a N 1 ¼ 1 has a negativeweight and all the other bits have positive

weight. A closed-form expression of a two's complement negative number is:

N 2

a ¼ 2 N 1

0 a i 2 i

þ for a < 0 ð 3 : 2 Þ

i¼

Combining (3.1) and (3.2) into (3.3) gives a unified representation to two's complement numbers:

N 2

2 N 1

0 a i 2 i

a ¼ a N 1 þ ð 3 : 3 Þ

i¼

It is also interesting to observe an unsigned equivalent of negative two's complement numbers.
Many SW and HW simulation tools display all numbers as unsigned numbers. While displaying
numbers these tools assign positive weights to all the bits of the number. The equivalent unsigned
representation of negative numbers is given by:

2 N jj ð 3 : 4 Þ

where jj is equal to the absolute value of the negative number a .
Example:

9 in a 5-bit two's complement representation is 10111. The equivalent unsigned
representation of 9is2 5

9 ¼ 23.

3.3.3 Computing Two's Complement of a Signed Number
The two's complement of a signed number refers to the negative of the number. This can be
computed by inverting all the bits and adding 1 to the least significant bit (LSB) position of the
number. This is equivalent to inverting all the bits while moving from LSB to MSB and leaving the
least significant 1 as it is. From the hardware perspective, adding 1 requires an adder in the HW,
which is an expensive preposition. Chapter 5 covers interesting ways of avoiding the adder while
computing the two's complement of a number in HW designs.
Example: The 4-bit two's complement representation of 2is4 0 b1110, its 2 0 s complement is

obtained by inverting all the bits, into 4 0 b0001, and adding 1 to that inverted number giving 4 0 b0010.
Table 3.3 lists the two's complement representations of 4 bit numbers and their unsigned
equivalent numbers. In two's complement, the representation of a negative number does look odd
because after 7 comes 8, but it facilitates the hardware implementation of many basic arithmetic
operations. For this reason, this representation is used widely for executing arithmetic operations in
special algorithms and general-purpose architectures.
It is apparent from (3.3) above that theMSB position plays an important role in two's complement
representation of a negative number and directly affects many arithmetic operations. While
implementing algorithms using two's complement arithmetic, a designer needs to deal with the
issue of overflow. An overflow occurs if a calculation generates a number that cannot be represented
using the assigned number of bits in the number. For example, 7

8, and 8 cannot be represented
as a 4-bit signed number. The same is the case with 9, which may be produced as ( 8) 1.

þ 1 ¼