System Design Flow and Fixed-point Arithmetic - Digital Design of Signal Processing Systems: A Practical Approach - page 82

justifies this preference in spite of apparent complexities and precision penalties. Cost, performance
and power dissipation are the main reasons for preferring fixed-point processors and HW for signal
processing systems. The fixed-point implementations are widely used for signal processing systems
whereas floating-point processors are mainly used in feedback control systems where precision is of
paramount importance. The chapter also highlights that currently integrated high gate counts on
FPGAs encourages designers to use floating-point blocks as well for complex DSP designs in
hardware.
The chapter then describes the equivalent format used in implementing floating-point algorithms
in fixed-point form. This equivalent format is termed the Qn.m format. All the floating-point
variables and constants in the algorithm are converted to Qn.m format. In this format, the designer
fixes the place of an implied decimal point in an N-bit number such that there are n bits to the left and
m bits to the right. All the computations in the algorithm are then performed on fixed-point numbers.
The chapter gives a systematic approach to converting a floating-point algorithm inMATLAB to
its equivalent fixed-point format. The approach involves the steps of levelization, scalarization, and
then computation of ranges for specifying the Qn.m format for different variables in the algorithm.
The fixed-point MATLAB code then can easily be implemented. The chapter gives all the rules to
be followed while performing Qn.m format arithmetic. It is emphasized that it is the developer's
responsibility to track and manage the decimal point while performing different arithmetic
operations. For example, while adding two different Q-format numbers, the alignment of the
decimal point is the responsibility of the developer. Similarly, while multiplying two Q-format
signed numbers the developer needs to throw away the redundant sign bit. This discussion leads to
some critical issues such as overflow, rounding and scaling in implementing fixed-point arithmetic.
Bit growth is another consequence of fixed-point arithmetic, which occurs if two different Q-format
numbers are added or two Q-format numbers are multiplied. To bring the result back to pre-defined
precision, it is rounded and truncated or simply truncated. Scaling or normalization before
truncation helps to reduce the quantization noise. The chapter presents a comprehensive account
of all these issues with examples.
For communication systems, the noise performance of an algorithm is critical, and the finite
precision of numbers also contributes to noise. The performance of fixed-point implementation
needs to be tested for different ratios of signal to quantization noise (SQNR). To facilitate
partitioning of the algorithm in HWand SWand its subsequent mapping on different components,
the chapter describes algorithm design and coding guidelines for behavioral implementation of the
system. The code should be structured such that the algorithm developers, SW designers and HW
engineers can correlate different implementations and can seamlessly integrate, test and verify the
design and can also fall back to the original algorithm implementation if there is any disagreement in
results and performance. FPGAvendors like Xilinx and Altera in collaboration with Mathworks are
also providing Verilog code generation support in several Simulink blocks. DSPbuilder from
Altera [1] and System Generator from Xilinx [2] are excellent utilities. In a Simulink environment
these blocksets are used for model building and simulation. These blocks can then be translated
for HWsynthesis. Amodel incorporating these blocks also enables SW/HWco-simulation. This co-
simulation environment guarantees bit and cycle exactness between simulation and
HW implementation. MATLAB also provides connectivity with ModelSim though a Link to
ModelSim utility.
Logic and arithmetic shifts of numbers are discussed. It is explained that a full analysis should be
performed while converting a recursive digital system to fixed-point format. Different computa-
tional structures exist for implementing a recursive system. The designer should select a structure
that is least susceptible to quantization noise. TheMATLAB filter design toolbox is handy to do the
requisite analysis and design space exploration. The chapter explains this issue with the help of an