Hardware Reference
In-Depth Information
were different. This error is important in specific cases, but in a larger codes it is
minimized, as shown in the GSM coder example.
To demonstrate the modeling capabilities of all the presented features an the
integration of the tool in a complete DSE process, an entire chapter is provided (Chap.
7), where M3-SCoPE is used to model a Power-Line Communication infrastructure.
2.7
Conclusions
SystemC has proven to be a powerful language for platform modeling. Nevertheless,
its full exploitation for this purpose requires significant research activity in order
to cover all the modeling requirements. The SCoPE framework has been described
taking advantage of the language capabilities for system modeling and simulation.
A methodology and associated library has been developed providing a complete OS
functionality that can produce accurate timed simulations of the SW components.
Power and timing estimations of the application SW running on the multi-processing
platform in close interaction with the rest of the platform components can be obtained
from the system simulation.
This chapter shows that native co-simulation can be applied successfully to this
task. The performance analysis technology is fast enough to support efficiently the
multiple runs required by DSE processes. To achieve this goal, M3-SCoPE has
been developed with several improvements to SCoPE: cache modeling, direct I/O
communication through pointers, memory space separation and dynamic platform
creation from XML files.
This tool has been assessed on an industrial demonstrator, as shown in Chap. 7. The
results demonstrate that the native co-simulation techniques proposed constitute a
sufficiently accurate technique that is much faster than ISS-based simulation systems.
This speed increase makes the technique optimal for fast system evaluation, covering
the need to obtain effective metrics, which is necessary for efficient Design Space
Exploration.
References
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ED Pearson, (2007).
2. ARM, Advanced RISC Machines Holdings. Retreived form www.arm.com
3. ARM Realview Development Suite (2005). Retreived form
www.arm.com/products/DevTools/RealViewDevSuite.html
4. Bailey, B., Martin, G., & Piziali, A.: ESL Design and Verification: A Prescription for Electronic
System Level Methodology. Morgan Kaufmann (2007).
5. Balarin, F., Giusto, P., Jurecska, A., Passerone, C., Sentovich, E., Tabbara, B., Chiodo,
M., Hsieh, H., Lavagno, L., Sangiovanni-Vincentelli, A. & Suzuki, K.: Hardware-Software
Codesign of Embedded Systems: The POLIS Approach. Springer (1997).
6. Becker, M. Di Guglielmo, G., Fummi, F., Mueller, W., Pravadelli, G. and Xie, T.: RTOS-Aware
Refinement for TLM2.0-based HW/SW Designs, Proc. of DATE, IEEE (2010).
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