Hardware Reference
In-Depth Information
interface for node interconnection, a DMA for large data transfers and an abstract
model of the physical memory to exchange data with the rest of the platform.
2.4.1
Bus Modeling
The techniques explained for SW estimation are always focused on fast performance
estimation. TLM models are very efficient for this kind of applications. In order to
take advantage of the simulation performance that TLM can provide, Programmer
View with Timing (PVT) models are used instead of bus cycle-accurate models. These
PVT models use behavioral descriptions with simplified communication mechanisms
to perform fast simulations.
The bus model developed uses the TLM library for fast data transmission. In
this way, communications are modeled by considering complete payload transfers
instead of word-by-word transfers. The bus manages the simulation time of each
transfer by considering parameters such as bus bandwidth, packet priority and size.
However, the bus needs another component to complete its functionality - an arbiter.
This module performs the transfer scheduling based on packet priority and delivery
order. Therefore, the threads that try to access the bus and are not scheduled are
blocked in a queue.
Another feature to take into account is the possibility to create bus hierarchy to
cover more platform designs. The bus interface is able to connect not only buses
with HW models, but also with other buses. This is implemented making use of the
standard TLM interface to communicate different components. This interface can
interconnect several modules transparently to the users.
2.4.2
HW Interfaces
M3-SCoPE provides several generic HW components, such as memory, bus, net-
work or DMA. Additionally user-defined components can be integrated in the HW
platform. In order to facilitate the integration of these user defined components, a
base class is provided to be used as a wrapper. This wrapper base class is in charge
of handling the TLM2 bus protocol management. The user needs to implement only
the functionalities for read and write functions.
Additionally, the wrapper includes an automatic power estimation infrastructure.
For each component it is possible to define parameters for the static power consump-
tion and dynamic power consumption for read and write accesses. For read/write
accesses it is possible to define two energy consumption values, one dependent on
the number of accesses and the other one that considers the size of the data transfers.
Applying all these parameters, M3-SCoPE automatically obtains an estimation of
the component power consumption to be added to the consumption of the rest of
system components. As all the HW component models (user-defined models and
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