M3-SCoPE: Performance Modeling of Multi-Processor Embedded Systems for Fast Design Space Exploration - Multi-objective Design Space Exploration of Multiprocessor SoC Architectures - page 36

2.3.3 Modeling of SW/HW Communication

One of the most important features in native co-simulation is the interconnection
between the native SW execution and the HW platform model. All accesses from
the SW code to the HW platform must be detected and redirected, otherwise the SW
will attempt to access the host peripherals, provoking multiple failures.

2.3.3.1 HW/SW Communication Using Device Drivers

The OS kernel and the API presented above are not enough to provide a complete OS
model for software modeling and refinement. Although application code refinement
is mostly supported, Hardware dependent Software (HdS) (such as drivers) is not
supported. A more complete model, capable of managing interruption handlers and
drivers, is required. The HdS is usually critical in embedded systems and its analysis
at the early stages of embedded system development can provide large benefits during
the rest of the project.
In order to perform correct HW/SW interface modeling it is required to have an OS
model capable of managing the I/O accesses from the processor to the peripherals,
and the interrupts the peripherals send to the processor. To manage the I/O, Linux-
based driver support is provided. Linux standard functions for registering, accessing
and managing drivers are integrated in the OS model, allowing the creation and use
of Linux drivers.
Interrupts are generated from the HW platform model and received by the appli-
cation SW modeling infrastructure, as explained in the previous section. When the
timing effects have been established, the OS facilities for interrupt handling are called
by the SW modeling infrastructure, calling the corresponding "wait" and "notify"
statements. The standard or user-defined handlers associated with the interrupts are
executed, performing the proper operations, and calling the corresponding drivers.
The HW timer interrupt is of special interest. It is used to manage timers, sleeps,
alarms and time-based scheduling policies, such as Round-Robin.
That way, HW/SW communication explicitly indicated in the code can be mod-
eled. The I/O functions connect the native SW execution with the HW platform
model. However, in embedded systems, HW/SW communication is not always so
explicit. Peripherals can also be accessed by reading and writing directly the ad-
dresses of the peripheral registers. This communication is possible by using C/C++
pointers.

2.3.3.2 Modeling of Direct I/O Accesses Through Pointers

When the addresses of the peripherals are known by the SW developer and the OS
allows that, peripheral registers can be directly accessed. For example, a device
connected to a serial port can be accessed in the following way:

char *uart_addr = 0x80001004;
*uart_addr = A;