M3-SCoPE: Performance Modeling of Multi-Processor Embedded Systems for Fast Design Space Exploration - Multi-objective Design Space Exploration of Multiprocessor SoC Architectures - page 30

Fig. 2.7 Complete
Annotation Process. The
original code is analyzed with
a C++ grammar. Then the
code is built adding marks to
identify the basic blocks and
cross-compiled. The resulting
code is analyzed to evaluate
the metrics of each basic
block, and the code is finally
rebuilt adding this
information

Source Code

Parser

XML Code

Basic Block
Identification

Cache Modelling
Instrumentation

Instrumented
Code

Cross-compiler

Target Assembly
Code

Native Compiler

Cache Model

Executive

Basic Block Table

To identify basic blocks at source level, the proposed solution is to insert specific
marks at the beginning and at the end of each basic block. This marked code is then
cross-compiled, so the marks introduced are preserved in the target assembly code.
The inserted marks looks like:

asm volatile("mark_xx:");
To prevent the compiler optimizations from deleting or moving such marks, they are
declared volatile. Additionally, to keep the behavior of the original code, the asm
instructions inserted consist simply of labels. This procedure guarantees that there
is always a direct correlation between source and assembly blocks. However, as the
effect of the compiler is constrained by the marks, the final binary code is not exactly
the target one, so some errors are generated.
Compiler optimizations might affect both intra-block and inter-block behavior.
Intra-block optimizations are considered in the characterization of the blocks from
assembly code. This assembly code already includes both front-end and back-end op-
timizations. Inter-block optimizations are considered by delimiting the basic blocks
at source level. Nevertheless, there are some compiler optimizations which cannot
be accurately considered with this technique. Loop unrolling replicates the body of
a loop statement in the assembly code, but from source point of view it is a unique
block.
Nevertheless, in processors with instruction cache, loop unrolling is rarely em-
ployed, since the miss cost for each iteration significantly exceeds the jump cost.