M3-SCoPE: Performance Modeling of Multi-Processor Embedded Systems for Fast Design Space Exploration - Multi-objective Design Space Exploration of Multiprocessor SoC Architectures - page 29

Fig. 2.6 Example of extra
code for annotating delays. At
the end of each basic block
the global variable “segment
time” is increased with the
block delay. At system calls
the final time value is applied
to the simulation

When running the simulation, this extra code is executed so we can estimate the
number of machine instructions executed. By multiplying this value by the average
energy per instruction provided in the XML files, an estimation of the total energy
required by the processor is obtained. It should be noted that, while this approach is
valid for all processors, the accuracy of the technique depends on the stability of the
power consumption of the target core.

2.3.1.1 Basic-Block Time Estimation

The estimation of the cost of each basic block in terms of time and power requires
using cross-compiled code to take into account compiler optimizations. However,
these compiler optimizations make it very complex to associate source code and
generated binary code [ 1 ]. Complex reverse compilation techniques can be applied
to correlate assembly blocks to source blocks [ 15 ]. However, this challenge is not
always feasible due to advanced compiler optimizations.
In this work, a hybrid level technique for SW annotation is proposed: while basic
block identification is performed at source level, characterization is obtained from
assembly code. This strategy simplifies the characterization process and speeds up
the analysis time.
To apply this solution to the DSE flow, a minimum effort from the designer is
required. The cache model and its associated methods have been implemented as an
independent library. Additionally, an automated instrumentation process performs
all necessary annotations in source code to link software execution with the cache
model. Figure 2.7 shows an overview of the cache estimation process, including
basic block characterization.
Due to the rich syntax of source code, a C/C++ code parser has been developed in
order to identify declarations, statements and expressions during the code annotation.
The parser, based on a C/C++YACC grammar, dumps the Abstract Syntax Tree (AST)
to a file in XML format. This XML serves as input to the block identification and
instrumentation processes. With the information included in the XML, the original
C/C++ code is rebuilt adding time, power and cache information. Furthermore, this
XML can be considered as an intermediate representation, independent from the
source language. Any language could be estimated by simply creating a front-end
for that language.