M3-SCoPE: Performance Modeling of Multi-Processor Embedded Systems for Fast Design Space Exploration - Multi-objective Design Space Exploration of Multiprocessor SoC Architectures - page 22

These abstract RTOS techniques also dedicate a large effort to accurately integrate
time annotation and OS modeling with HW/SW communication, especially for HW
interrupt management. Very few of these approaches support a real OS Application
Programming Interface (API) such as TRON or POSIX [ 21 , 47 ]. The idea of inte-
grating facilities for OS modeling in SystemC was proposed as a new version of the
language some years ago by the SystemC consortium. However, OS modeling at
system level proved to be a much more complex task than expected, becoming an
active research area.
However, none of these modeling methodologies are aimed at complex Multi-
Processor Systems-on-Chip (MPSoC) modeling. Current MPSoC modeling requires
dynamic task mapping, drivers and interrupt management which are not covered
by previous modeling techniques especially with the requirement of fast simula-
tion speed during performance estimations and system dimensioning. Moreover, a
framework is required that supports a complete model of the platform that can easily
integrate new components, either an application-specific HW or a programmable
processor. When the application SW code of each function has not yet been devel-
oped, the underlying simulation technology supporting native simulation can be used
for high-level performance analysis [ 16 , 17 , 36 ].
In this chapter, M3-SCoPE, a framework for performance modeling of multi-
processing embedded systems for fast DSE is described. The proposed system sim-
ulation technology includes abstract models of the RTOS and the multi-processing
architecture that can easily integrate the application SW through the RTOS API (i.e.
POSIX). The SW is annotated with estimations of the execution time and power
consumption. The multi-processing architecture is connected through an abstract
Transaction-Level Model (TLM) of the bus with the peripherals and application-
specific HW components. Different nodes in the system can be connected through
networks. The SW simulation technology includes novel features such as dynamic
time estimation and cache modeling.
Additionally, to allow evaluating complete, heterogeneous systems in an efficient
way, simulation tools require capabilities to automatically create the system models
for the different configurations. On one hand, DSE tools do not have the capability
to drive the creation of the platform models. On the other hand, need for manual
recoding for each evaluation point results in too long exploration times. Several
previous works have been proposed to solve or minimize the effort required for
platform model creation. Automatic generation of system models oriented to specific
target architectures has been proposed in [ 35 , 60 ]. Other works have been focused
on automating the exploration of component interconnection [ 33 , 42 , 61 ]. However,
none of these approaches cover model generation for complete architectures in the
general case.
To provide more generic techniques, TLM techniques based on system-level de-
sign languages like SystemC have been proposed [ 13 , 25 , 43 , 55 ]. Green-socks is
an open source infrastructure for distribution of TLM models [ 32 ]. In [ 45 ] a TLM
framework for automatic system model generation is proposed. The framework re-
ceives a fixed system description and generates the executable system model. In [ 39 ,
51 ] TLM infrastructures are used to accurately estimate SW performance.