Hardware Reference
In-Depth Information
Table 9.1 Design space size and simulations required for the optimization of each version of
the MPEG4 encoder. In the last column, a summary of the overall design space and number of
simulations needed for the optimization of all versions
ρ
1
3
4
5
6
7
Grand total
Design space
6
216
1,296
7,776
46,656
279,936
335,886
Simulations
6
216
309
567
694
1,077
2,869
full search optimization approach for the application versions where the design space
is small enough (i.e., for ρ
3); the Non-dominated Sorting Genetic Algorithm
(NSGA-II) [ 2 ] is used when the design space grows too much (i.e., for ρ> 3).
In particular the genetic algorithm is run with a population size
|
ρ for 50
generations.
Table 9.1 reports for each parallelized version of the application the design space
size and the number of simulations needed to perform the optimization. Due to the
huge number of simulations needed to perform the overall exploration (i.e., 2,869),
only the HLSim is used within the optimization loop. Note that one simulation on
HLSim takes around 45 s whereas the same simulation takes around4honcycle-
accurate simulator. Figure 9.5 shows the derived final Pareto configurations for the
MPEG4 encoder encoding 10 frames at 4CIF resolution.
The CoWare-based simulator (TLMsim) is built to model a Transaction Level
Model (TLM) of the platform at a cycle-accurate level . This simulator is used to
validate the results obtained by HLSim and also this simulator is used to do a local-
ized, focused explorations of the parameters not supported by HLSim. As explained
60
1 resource
3 resources
4 resources
5 resources
6 resources
7 resources
50
40
30
20
10
0
0
0.05
0.1
0.15
0.2
0.25
Average time per frame [seconds]
Fig. 9.5 Pareto optimal operating configurations for the MPEG4 encoder (encoding 10 frames at
4CIF resolution) by varying the number of resources
 
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