High-Level Modeling and Exploration of a Powerline Communication Network Based on System-on-Chip - Multi-objective Design Space Exploration of Multiprocessor SoC Architectures - page 149

node in order to model real traffic. Each generator is coupled with a traffic monitor.
The number and characteristics (UDP/TCP, traffic shape, etc.) can be configured
in the simulation.

￿ PLC channel: This module models the behavior of a real PLC channel, intro-

ducing link characteristics (noise, etc.) to each of the logic connections between
the different nodes of the system. The characteristics of the PLC channel can be
configured in the simulation.

￿ PLC Nodes: This module represents the part of the system that will be built over

a DS2 chipset. It is divided in the following components:
- HW models: High level model of hardware blocks in the final system. Each of

the modules is written in C and presents SystemC-TLM ports to be connected
to the bus and the rest of the modules. The model respects the timings of the
final implementation and has been annotated with important information for
the simulation (power consumption, resources, etc.)

- Bus interconnection infrastructure: SystemC/TLM model of the bus that will

be present within DS2's digital circuit

- HdS: Hardware-dependent software is part of the overall software. This block

represents the lower levels of the software, making the interface with hardware
resources. As we can work at different levels of abstraction for the HW models
(TLM to RTL). The HdS has to be updated for each of the levels of abstraction
we are working with (register-level when working with RTL and transaction
level when working in SystemC). In the case of MULTICUBE, a simplified
version of the HdS is used since we only work at system level

- OS Model / SCoPE: Through the use of SCoPE tool, we can model our real time

Operating System (OS) in SystemC-TLM and make use of it in our platform.
This way, we can run application software directly in the platform without
having to adapt it and without making use of a slow ISS for the microprocessor
behavior. SCoPE also introduces an estimation of the timings of the software
and synchronizes SW timings and HW timings. MULTICUBE SCoPE plug-in
extends SCoPE functionalities that we will see later on.

- Application SW: Real application SW that will be run over the virtual platform,

the FPGA debugging prototypes and final ASIC products. In MULTICUBE,
the SW will be frozen

While other use cases of the project are focused on applications that look for the
highest computing power with the available resources, powerline use case is centered
in optimizing a medium-end platform that run a control-oriented complex protocol.
The overall goal is to optimize the cost of the overall solution while maintaining the
necessary performance for the specific application but with minimal changes in the
platform processing power. The main differences with the other use cases presented
in MULTICUBE project are listed in Table 7.1 .