Response Surface Modeling for Design Space Exploration of Embedded Systems - Multi-objective Design Space Exploration of Multiprocessor SoC Architectures - page 75

Chapter 4
Response Surface Modeling for Design Space
Exploration of Embedded Systems

Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria, Enrico Rigoni,
Carlos Kavka, Alessandro Turco, and Giovanni Mariani

Abstract A typical design space exploration flow involves an event-based simulator
in the loop, often leading to an actual evaluation time that can exceed practical limits
for realistic applications. Chip multi-processor architectures further exacerbate this
problem given that the actual simulation speed decreases by increasing the number
of cores of the chip. Traditional design space exploration lacks of efficient techniques
that reduce the number of architectural alternatives to be analyzed. In this chapter,
we introduce a set of statistical and machine learning techniques that can be used
to predict system level metrics by using closed-form analytical expressions instead
of lengthy simulations; the latter are called Response Surface Models (RSM). The
principle of RSM is to exploit a set of simulations generated by one or more De-
sign of Experiments strategies to build a surrogate model to predict the system-level
metrics. The response model has the same input and output features of the origi-
nal simulation-based model but offers significant speed-up by leveraging analytical,
closed-form functions which are tuned during model training. The techniques pre-
sented in this chapter can be used to improve the performance of traditional design
space exploration algorithms such as those presented in Chap. 3.

4.1 Introduction

Nowadays, Multi-Processor Systems-on-Chip (MPSoCs) and Chip-Multi-
Processors (CMPs) [ 5 ] represent the de facto standard for both embedded and
general-purpose architectures. In particular, programmable MPSoCs have become
the dominant computing paradigm for application-specific processors. In fact, they
represent the best compromise in terms of a stable hardware platform that is soft-
ware programmable, thus customizable, upgradable and extensible. In this sense,
the MPSoC paradigm minimizes the risk of missing the time-to-market deadline

V. Zaccaria ( )
Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milano, Italy
e-mail: [e-mail]