Information Technology Reference
In-Depth Information
Figure 2.37:
In pure binary (a) this mapping of real numbers is used. In two's complement an alternative mapping
(b) is used. See text.
Figure 2.38
shows how a real ADC is configured to produce two's complement output. At (a) an analog offset
voltage equal to one half the quantizing range is added to the bipolar analog signal in order to make it unipolar as
at (b). The ADC produces positive-only numbers at (c) which are proportional to the input voltage. This is actually
an offset binary code. The MSB is then inverted at (d) so that the all-zeros code moves to the centre of the
quantizing range. The analog offset is often incorporated into the ADC as is the MSB inversion. Some convertors
are designed to be used in either pure binary or two's complement mode. In this case the designer must arrange
the appropriate DC conditions at the input. The MSB inversion may be selectable by an external logic level. In the
broadcast digital video interface standards the colour difference signals use offset binary because the codes of all
zeros and all ones are at the end of the range and can be reserved for synchronizing. A digital vision mixer simply
inverts the MSB of each colour difference sample to convert it to two's complement.
Figure 2.38:
A two's complement ADC. In (a) an analog offset voltage equal to one-half the quantizing range is
